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基于FPGA的数字钟设计
基于FPGA的数字钟的设计，外部时钟32MHz，通过分频器得到秒脉冲，用于正常工作时的计数脉冲。通过分频还得到一个5ms的脉冲，用于按键的消抖（具体原理可见程序）。输入的信号有三个：1.时钟信号2.校时模式设置按键3.校时调整按键，输出通道6位数码管。共有：校时模块，24计数的小时计数模块，60计数的分钟计数模块，60计数的秒钟计数模块。
- 2022-04-01 05:03:17下载
- 积分：1
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usb控制器，有VHDL实现的，还有C++的源码，可以编译
usb控制器，有VHDL实现的，还有C++的源码，可以编译-usb controller, there is the realization of VHDL, as well as C++ source code can be compiled
- 2022-03-31 17:48:55下载
- 积分：1
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juanji
说明： 采用vhdl语言编写的卷积编码（2.1.7），通过调试可直接下载使用(Convolution using vhdl language code (2.1.7) can be directly downloaded through the use of debugging)
- 2010-03-31 17:55:07下载
- 积分：1
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verilog-axi-master
说明： Verilog AXI Components Readme
GitHub repository: alexforencich verilog-axi
- 2020-11-04 14:39:51下载
- 积分：1
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使用CORDIC实现三角函数计算，使用VHDL语言实现
利用cordic实现三角函数的计算，用vhdl实现-use cordic achieve trigonometry calculations, using achieve vhdl
- 2022-01-20 22:30:42下载
- 积分：1
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Verilog_traffic
若农场路无车辆，则在高速路保持绿灯。在探测农场路有车辆，高速路上的交通灯应由绿到黄，再到红，并允许农场路方向灯变绿，绿灯亮一段时间，由绿变黄再到红。(If there is no vehicle on the farm road, keep the green light on the highway. There are vehicles on the farm road, the traffic lights on the high speed road should be green to yellow, and then red, and allow the farm road lights to turn green, the green light for a period of time, from green to yellow, then to red.)
- 2020-07-17 21:08:48下载
- 积分：1
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FPGA based implementation of a SDR
FPGA based implementation of a SDR - codes in Verilog HDL for the processor and control.-FPGA based implementation of a SDR- codes in Verilog HDL for the processor and control.
- 2022-12-18 09:05:03下载
- 积分：1
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存储示波器，功能齐全通过验证，毕业设计用
存储示波器，功能齐全通过验证，毕业设计用-Storage oscilloscope, a full-featured validated, graduation design
- 2022-03-21 02:58:36下载
- 积分：1
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5408A
The SPFD5408A, a 262144-color System-on-Chip (SoC) driver
LSI designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 240xRGBx320 in resolution which can
be achieved by the designated RAM for graphic data. The
720-channel source driver has true 6-bit resolution, which
(The SPFD5408A, a 262144-color System-on-Chip (SoC) driver
LSI designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 240xRGBx320 in resolution which can
be achieved by the designated RAM for graphic data. The
)
- 2012-07-16 17:09:15下载
- 积分：1
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VHDL_modelling_guidelines是vhdl建模开发的指导资料
VHDL_modelling_guidelines是vhdl建模开发的指导资料-VHDL modeling VHDL_modelling_guidelines is guiding the development of information
- 2022-03-12 23:37:10下载
- 积分：1
