-
完成ITUR656标准的视频流数据向RGB格式的转换。
完成ITUR656标准的视频流数据向RGB格式的转换。-Complete video streaming ITUR656 standard data format to RGB conversion. Test module
- 2022-02-13 16:12:20下载
- 积分:1
-
led_test
在Quartus II 上编程的基于FPGA的LED显示实验(Programming in the Quartus II LED display experiment based on FPGA
)
- 2013-08-13 08:55:45下载
- 积分:1
-
VerilogHDL,对初学者很有帮助的,可以一下的!
VerilogHDL,对初学者很有帮助的,可以一下的!-VerilogHDL, very helpful for beginners, you can look in!
- 2023-02-06 11:05:03下载
- 积分:1
-
VHDL语言写的波形发生器和sine波形发生器
VHDL语言写的波形发生器和sine波形发生器,一共两个文件,通信开发平台专用。这是一个典型的正玄波发生器程序和一个任意波形发生器程序,大家可以参考学习,对于vhdl入门还是很有帮助的-This
is a typical wave generator Shogen procedures and an arbitrary waveform
generator procedures, Members can take a learning portal for VHDL or
helpful
- 2022-05-29 18:31:54下载
- 积分:1
-
Altium Partner SN-1000010 r10
说明: Browser modularization processing, browser modularization combing, browser modularization expansion
- 2020-06-24 04:20:01下载
- 积分:1
-
编码器程序
用于编码器计数,速度能够达到5ms/1圈,速度很快,而且杂波也很好,能够准确应用。已应用在工程中很多年
- 2022-01-25 17:17:23下载
- 积分:1
-
Synopsys-RTLSystemC
synopsys的systemc和RTl书籍清晰电子版,专业权威的EDA公司的培训资料(synopsys of systemc and RTl clear electronic version of books, professional authority of the EDA company' s training materials)
- 2010-08-11 11:49:49下载
- 积分:1
-
verilog-som
拿verilog编写的som(自适应神经网络算法),用于障碍物检测,基于FPGA可综合实验,已经在altera的cylcone上实现(Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone)
- 2020-07-09 20:38:55下载
- 积分:1
-
callback
说明: This is code of UVM CALLBACK function.
- 2020-06-24 15:40:02下载
- 积分:1
-
facman
一款在Verilog实现的吃豆人游戏,采用VGA接口,在Nexys3开发板上运行无误。(A pac-man game implemented via Verilog, using VGA interface, perfectly run on Nexys 3)
- 2021-03-31 07:39:09下载
- 积分:1