-
Noise-cancellation
this contain the source code for noise cancellation ,which can be used in c platform.
- 2012-10-21 23:32:37下载
- 积分:1
-
ethernet_udp_ep4c_ok_final
用ALTERA的FPGA实现UDP通信源代码(FPGA UDP)
- 2015-04-27 01:15:36下载
- 积分:1
-
用verilog写的基于cpld的出租车计费器的源码,需要的参考一下
用verilog写的基于cpld的出租车计费器的源码,需要的参考一下-Use verilog to write a taxi based cpld billing device source code, need to refer to
- 2022-06-11 23:05:49下载
- 积分:1
-
motionjpeg的FPGA编码实现,有点老了,但是可以参考.有些东西和h.264是差不多的....
motionjpeg的FPGA编码实现,有点老了,但是可以参考.有些东西和h.264是差不多的.-motionjpeg FPGA Coding, a bit old, but the reference. Some things and h.264 is roughly the same.
- 2022-04-30 02:44:38下载
- 积分:1
-
等精度频率计
基于FPGA的等精度频率计,包括工程,doc和一些查找资料(An equal precision frequency meter based on FPGA, including engineering, Doc, and some lookup data)
- 2020-10-30 21:39:57下载
- 积分:1
-
应用硬件描述语言产生随机数,在模糊控制仿真中应用的较多...
应用硬件描述语言产生随机数,在模糊控制仿真中应用的较多-By VHDL generating random Numbers, in the application of the fuzzy control simulation
- 2022-06-15 20:13:25下载
- 积分:1
-
verilog-code-style-specification
企业用verilog代码风格规范 本规范规定了IC设计项目开发过程中VerilogHDL源代码的编写总则、要求及模板文件。(Enterprises with verilog code style guide for the preparation of this specification General IC design project development process VerilogHDL source code, requirements and template files.)
- 2015-05-31 16:06:37下载
- 积分:1
-
textiowrite
quartus ii 环境下,一个完整的利用TEXTIO仿真的源代码,包括读数据文件和输出数据到文件。(Under quartus ii environment, a complete simulation using TEXTIO source code, including reading data files and output data to a file.)
- 2014-02-03 23:56:30下载
- 积分:1
-
relay_test
Simple relay trigger
- 2015-01-28 12:16:35下载
- 积分:1
-
ViterbiAlg
说明: Viterbi译码,IS-95中的1/2码率的卷积码(Viterbi decoding, IS-95 of 1/2 the rate Convolutional Codes)
- 2006-04-11 14:10:58下载
- 积分:1