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Copy-of-DIGITAL-VLSI-DESIGN
a manual for design implementation of fpga and ASIC using verilog
- 2012-09-04 17:34:58下载
- 积分：1
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Using FPGA to achieve the VGA/LCD display relevant knowledge, including the proc...
用FPGA实现的VGA/LCD显示的相关知识,包含了程序的主要结构和主要功能模块的实现过程-Using FPGA to achieve the VGA/LCD display relevant knowledge, including the procedures for the main structure and main function modules of the realization process
- 2022-03-30 17:25:10下载
- 积分：1
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Slave-FIFO
详细讲解Slave FIFO模式下的初始化设置和相对应寄存器说明(Explain in detail the initial setup Slave FIFO mode and the corresponding register description)
- 2014-03-18 17:33:23下载
- 积分：1
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256字节深度的RS232串口程序,共分4个模块,顶层文件FIFO程序串口收和串口发.经过测试已用于产品.可靠!...
256字节深度的RS232串口程序,共分4个模块,顶层文件FIFO程序串口收和串口发.经过测试已用于产品.可靠!-Depth of 256-byte Serial RS232 procedures, divided into four modules, top-level document procedures FIFO serial and serial-fat collection. After the test has been used in products. Reliable!
- 2022-01-26 06:37:51下载
- 积分：1
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VHDL产生时钟50分频程序，供初学者参考
VHDL产生时钟50分频程序，供初学者参考-VHDL generated clock frequency of 50 procedures, the reference for beginners
- 2022-03-06 08:34:20下载
- 积分：1
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软件开发环境ISE 7.1i仿真环境：ModelSim SE 6…
软件开发环境：ISE 7.1i
仿真环境：ModelSim SE 6.0
1. 这个实例实现通过ModelSim工具实现一个具有“百分秒，秒，分”计时功能的数字跑表；
2. 工程在project文件夹中，双击paobiao.ise文件打开工程；
3. 源文件在rtl文件夹中，paobiao.v为设计文件，paobiao_tb.tbw是仿真测试文件；
4. 打开工程后，在工程浏览器中选择paobiao_tb.tbw，在Process View中双击“Simulation Behavioral Model”选项，若正确安装ModelSim，系统将自动打开ModelSim进行行为仿真，运行仿真即可得到仿真结果。-Software development environment: ISE 7.1i simulation environment: ModelSim SE 6.01. Realize this instance through the ModelSim tool realize a
- 2022-02-19 23:39:17下载
- 积分：1
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hamid
very nice program that i ensure anyone can use easily and will be efficient for hard project of elevator
- 2009-07-26 13:27:38下载
- 积分：1
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单相逆变simulink仿真
说明： 利用Matlab/simulink实现电力仿真，其中单相逆变可用于多电平变流器的基础使用，本案例提供了不同调制手段实现逆变的模型(Matlab / Simulink is used to realize power simulation, in which single-phase inverter can be used as the basis of multi-level converter. This case provides the inverter model with different modulation means)
- 2019-11-12 15:03:55下载
- 积分：1
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Verilog HDL
基于Verilog HDL的数字电压表的程序-Verilog HDL-based procedures for the digital voltmeter
- 2023-07-27 02:05:03下载
- 积分：1
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Encoder_SSI_Veryilog
说明： 本文详细描述了SSI协议的通讯格式、原理及应用电路,并采用verilog语言实现了SSI通讯协议.设计实用电路并实现了与绝对值编码器的通讯(SSI protocol described in detail the communication format, principle and application circuit, and use verilog language of the SSI protocol. Practical circuit design and implementation of the communication with the absolute encoder)
- 2020-12-28 20:59:02下载
- 积分：1
