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并串转换
利用VHDL语言实现并串转换过程。利用VHDL语言实现并串转换过程。利用VHDL语言实现并串转换过程。利用VHDL语言实现并串转换过程。利用VHDL语言实现并串转换过程。
- 2023-06-03 10:20:03下载
- 积分:1
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matrix_class
it is a matrix library. it is needed for fir fier.
- 2014-08-29 22:29:24下载
- 积分:1
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mealy fsm 和moore fsm
mealy fsm å’Œmoore fsm-mealy Fsm and moore Fsm
- 2023-04-04 18:30:04下载
- 积分:1
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此程序基于ADC0809,它是CMOS的8位A/D转换器,片内有8路模拟开关,可控制8个模拟量中的一个进入转换器中。...
此程序基于ADC0809,它是CMOS的8位A/D转换器,片内有8路模拟开关,可控制8个模拟量中的一个进入转换器中。-Connection between ADC 0809, it was the eight CMOS A/D converters. Tablets containing eight analog switches, control eight of analog converters enter a Chinese.
- 2023-07-11 04:50:03下载
- 积分:1
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verilog_DATA_displays
使用verilog语言,滚动显示“verilog”字符串程序代码及相关说明(Using verilog language, scrolling display " verilog" string code and instructions)
- 2014-01-16 10:49:55下载
- 积分:1
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Triscend supports the use of the Model Technology ModelSim logic simulator for V...
Triscend supports the use of the Model Technology ModelSim logic simulator for VHDL simulation of
designs implemented in the Configurable System Logic (CSL) portion of a Triscend device.
- 2023-07-10 18:40:02下载
- 积分:1
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cpu_easy
ADD MOV MOVi SUB四指令cpu设计,qutartus,(Design of four-instruction CPU)
- 2019-05-13 11:44:49下载
- 积分:1
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基于DDS的移相信号发生器的设计
4、各个功能的主要源程序
1、移相模块:
= 1 * GB2 * MERGEFORMAT ⑴、相位累加器:
architecture one of add32 is
begin
s
- 2023-02-10 04:25:04下载
- 积分:1
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vhdl
说明: 学习VHDL可以用得上,有很多实例,可以对照着自己写一些东西(VHDL can be useful to learn, there are many examples, can be done to write something)
- 2008-10-31 20:59:04下载
- 积分:1
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蓝牙HCI―UART与并口的FPGA控制接口设计
蓝牙HCI―UART与并口的FPGA控制接口设计-Bluetooth HCI-UART and parallel port control interface of the FPGA design
- 2022-07-10 22:33:51下载
- 积分:1