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sdram_hr_hw_4port
这个是DE2上的SDRAM 四个端口的驱动代码，相当实用！(This is a four-port SDRAM on a DE2 driver code, very useful!)
- 2010-07-14 21:21:05下载
- 积分：1
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可综合的Verilog语法（剑桥大学，影印）
可综合的Verilog语法（剑桥大学，影印）.(A comprehensive Verilog Grammar (University of Cambridge, photocopy).)
- 2018-01-13 00:32:05下载
- 积分：1
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基于SPWM自治FPGA
基于FPGA的自治型SPWM波形发生器的设计！正弦脉宽调制（SPWM）技术在以电压源逆变电路为核心的电力电子装置中有着广泛的应用，如何产生SPWM脉冲序列及其实现手段是PWM技术的关键。大家共同探讨哈！-FPGA based SPWM autonomy-based waveform generator design! Sinusoidal pulse width modulation (SPWM) technology in the voltage source inverter circuit as the core of the power electronic devices have a wide range of applications, how to generate SPWM pulse sequence and its implementation means PWM technology is the key. Kazakhstan investigate everyone!
- 2023-03-04 10:10:03下载
- 积分：1
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VHDL programming language introduced the basic grammar, and some programming exa...
介绍了ＶＨＤＬ编程语言的基本语法，和一些编程实例-VHDL programming language introduced the basic grammar, and some programming examples
- 2023-02-13 15:55:04下载
- 积分：1
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vhdl N
vhdl N-0.5分频方法设计，可以输入任意数值N，即分得到N－0.5的频率。-vhdl N- 0.5-frequency method, we can input arbitrary numerical N, namely, to be N- 0.5 frequencies.
- 2022-01-31 02:10:11下载
- 积分：1
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用于FPGA的变长编码算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。...
用于FPGA的变长编码算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-Variable-length encoding for FPGA HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.
- 2022-02-13 17:47:49下载
- 积分：1
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用Bresenham算法在FPGA上实现小数分频器，verilog编写，计算机图形法...
用Bresenham算法在FPGA上实现小数分频器，verilog编写，计算机图形法-Bresenham algorithm used in the FPGA to achieve a small number of crossovers, verilog preparation, computer graphics method
- 2022-03-11 03:26:38下载
- 积分：1
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Electronic code lock procedure, enter the correct password, the lock will open,...
电子密码锁程序，密码输入正确之后，锁就打开，如果输入的三次的密码不正确，就锁定按键3秒钟，同时发现报警声-Electronic code lock procedure, enter the correct password, the lock will open, if entered incorrect password three times, on the lock button 3 seconds, also found the sound alarm
- 2022-07-19 14:11:19下载
- 积分：1
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Continuous_acoustic_emission_board
说明： 多通道连续声发射数据采集，每个通道最大5M，采用verilog编程，内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)
- 2020-06-25 13:00:01下载
- 积分：1
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BulkIn是FPGA向CY7C68013发送数据
BulkOut是FPGA从CY7C68013接收数据,可以用LED显示...
BulkIn是FPGA向CY7C68013发送数据
BulkOut是FPGA从CY7C68013接收数据,可以用LED显示
-BulkIn is the FPGA to the CY7C68013 is BulkOut send data CY7C68013 receive data from the FPGA, you can use LED display
- 2022-08-15 04:42:44下载
- 积分：1
