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application-in-card-and-servo-drive
AB相编码器解码接口_PWM输出SOPC方案及其在运动控制卡和伺服驱动器中的应用(AB phase encoder decoder interface _PWM output SOPC program and its application in motion control card and servo drive)
- 2012-03-22 12:44:52下载
- 积分：1
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adder_array
adder_array的设计。加法器阵列设计，顶层模块，四步流水，21位(adder_array the design. The adder array design, top-level module, four-step pipeline, 21)
- 2013-04-17 00:19:05下载
- 积分：1
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十字路
控制路线和街道交叉口的简单程序，路线优先，街道上有车辆检测器；
- 2022-03-04 07:16:26下载
- 积分：1
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hamming_encodeadecode
用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错，然后将其纠错译码并输出，详细过程见仿真。(Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and then error correction decoding and output, see the detailed process simulation.)
- 2011-04-22 16:46:39下载
- 积分：1
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Verilog
Verilog经典教程，很好的学习Verilog的书籍，对学习硬件编程很有帮助。(Verilog classic handbook, good learning Verilog books, to learn hardware programming helpful.)
- 2013-08-19 11:02:51下载
- 积分：1
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Hynix公司8M Byte SDR SDRAM的Verilog语言仿真实现
Hynix公司8M Byte SDR SDRAM的Verilog语言仿真实现-Hynix" s 8M Byte SDR SDRAM Simulation of the Verilog language
- 2022-01-27 22:19:48下载
- 积分：1
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~ VHDL源代码的FFT IP核
FFT变换的IP核的源代码 VHDL~-FFT IP core of the source code for VHDL ~
- 2022-02-25 23:54:48下载
- 积分：1
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LS165
LS165移位寄存器的verilog语言编写(The writing of the Verilog language of LS165 shift register)
- 2020-11-22 22:59:34下载
- 积分：1
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29335-素材（代码）
说明： 基于fpga的数字图像处理原理及应用源码(The principle and source code of digital image processing based on FPGA)
- 2020-07-02 05:00:02下载
- 积分：1
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VHDL design entities, the basic structure of the language element of VHDL using...
VHDL设计实体的基本结构
VHDL的语言要素
用VHDL实现电路设计的方法
VHDL设计流程-VHDL design entities, the basic structure of the language element of VHDL using VHDL circuit design approach to achieve VHDL design flow
- 2022-08-10 09:13:22下载
- 积分：1
