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math_real
in this code very useful for designing real number concept
- 2013-11-19 19:54:40下载
- 积分：1
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Walsh
说明： 利用ISE编写的产生WALSH码的verilog程序，简单易懂，稍稍修改就可以产生出自己想的8 16 32 64位的WALSH码。。(Prepared using ISE verilog code generated WALSH procedures, easy to understand, a little modification can generate their own like the 8,16，32，64-bit code WALSH. .)
- 2010-04-20 09:55:10下载
- 积分：1
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以上是VHDL硬件描述语言写的一个简单锝路流水灯程序,希望对刚接触VHDL的朋友有一定帮助...
以上是VHDL硬件描述语言写的一个简单锝路流水灯程序,希望对刚接触VHDL的朋友有一定帮助-These are the VHDL hardware description language written in a simple flow path lights technetium procedures,刚接触VHDL want to have some friends to help
- 2023-08-06 14:45:02下载
- 积分：1
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cpsk_dpsk
数字通信系统相移键控CPSK信号和差分相移键控的调制与解调的VHDL代码(Phase shift keying digital communication system CPSK signals and differential phase-shift keying modulation and demodulation of the VHDL code for)
- 2009-11-06 16:11:03下载
- 积分：1
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C4gx15_starter_qsys_pcie_gen1x1
PCIe demo sample code
- 2020-12-09 16:39:19下载
- 积分：1
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bundle_test5
说明： 一个具备bp协议典型功能的数据传输系统（超时重传机制以及托管传输）包含五个节点(A data transmission system with typical functions of BP protocol (Overtime retransmission mechanism and managed transmission) consists of five nodes)
- 2019-12-02 19:06:44下载
- 积分：1
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等精度频率计的verilogHDL的实现,我花了好长时间才写的哦
等精度频率计的verilogHDL的实现,我花了好长时间才写的哦
- 2022-06-28 09:27:01下载
- 积分：1
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8bit-cpu
VHDL由简单存储器，计数器等搭建最终实现8位的cpu设计(VHDL realization 8 of cpu design)
- 2015-10-16 14:26:34下载
- 积分：1
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VHDL USB2.0接口源码,内有说明,详细.
VHDL USB2.0接口源码,内有说明,详细.-VHDL USB2.0 interface source code, which is described in detail.
- 2022-04-29 19:53:42下载
- 积分：1
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An_enhanced_security_measures_DSP
通过总结当前对处理器架构的安全性能的处理方法，提出一种增强DSP处理器安全性能的方法。主要从并行性方面进行了改进。最后对改进的方法进行了仿真和结果分析。(By summing up the current security architecture of the processor performance approach, a DSP processor to enhance the safety performance of the method. Mainly from the aspects of parallelism to improve. Finally, improved methods and results of simulation analysis.)
- 2009-03-30 11:18:09下载
- 积分：1
