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can_controller
基于FPGA的VHDL,can总线控制的设计与实现,在ISE下弄的。(FPGA-based VHDL, can control the design and implementation of the bus, get under the ISE' s.)
- 2011-05-05 23:32:25下载
- 积分:1
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一个可以使用的RocketI/O开发实例。基于Xilinx FPGA Virtex5平台。
一个可以使用的RocketI/O开发实例。基于Xilinx FPGA Virtex5平台。-One can use RocketI/O development example. Based on Xilinx FPGA Virtex5 platform.
- 2022-02-12 14:18:54下载
- 积分:1
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华勒斯树结构的8位修正展位乘数
应用背景Booth乘法器实现快速乘法algorithm.mainly用于通信和DSP组成的3块摊位重新编码,华勒斯树和超前进位addder关键技术超大规模集成电路设计,通信和DSP的应用,芯片设计,VHDL,Verilog程序,加法器和乘法器
- 2022-02-04 19:57:10下载
- 积分:1
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FFT_verilog
说明: verilog实现的FFT变换,经硬件测试其功能与Altera的FFT IP核相近(verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to)
- 2009-08-26 11:29:57下载
- 积分:1
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class-test
自己编写的C++的类的测试程序,有详细的注注释,对初学者有很大帮助!!!(The own written C++ class test program, detailed annotation of Note of great help for beginners! ! !)
- 2012-08-28 09:24:41下载
- 积分:1
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Interface design between microprocessor and cpld ,suit for IC design and applica...
cpld与单片机接口设计,利于电子设计及应用- Interface design between microprocessor and cpld ,suit for IC design and application
- 2022-03-25 22:52:32下载
- 积分:1
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完成的是RS422信号的计数功能,并产生一定的触发信号
完成的是RS422信号的计数功能,并产生一定的触发信号-RS422 signals the completion of the count function, and produce a certain trigger signals
- 2022-04-14 14:08:50下载
- 积分:1
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SV-Combinational-Logic
system Verilog combinational logic
- 2017-01-24 18:50:29下载
- 积分:1
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rs485_uart
fpga的RS485代码,非常容易,适合学习(the code of rs485 in fpga, very easy,suitable for learning)
- 2019-07-11 14:24:54下载
- 积分:1
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FPGA2-DSP2-EDMA
例程是基于quartus的,FPGA通过EMIF给DSP发送数据,里面包含了一个简单的状态机和一个基于IP核的fifo,适合初学者(Routine is the FPGA to send data to the DSP via EMIF, which contains a simple state machine and an IP-based core fifo, suitable for beginners)
- 2020-12-04 16:09:24下载
- 积分:1