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PWM
说明： 通过一个计数器来实现输出信号的占空比要求，可以将duty_cycle分配到拨码开关上,LED分配到发光二极管上,然后调节拨码开关,即可看到LED的亮度发生变化.(The duty cycle of the output signal can be assigned to the dial switch by a counter, and the LED can be assigned to the light emitting diode. Then the brightness of the LED can be seen by adjusting the dial switch.)
- 2020-06-16 13:20:02下载
- 积分：1
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FM_DemodNew
FM接收机 基于FPGA的调频收音机的设计
用VEIRLOG语言编程，利用QUARTUSii与MODELSIM联合仿真(FM receiver on FPGA FM receiver design
With VEIRLOG language program, use QUARTUSii and MODELSIM joint simulation)
- 2021-04-07 12:49:01下载
- 积分：1
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单周期cpu
说明： 该文件包含了实现单周期cpu的全部代码以及实验报告，包括仿真波形以及烧板过程(This file contains all the codes and experimental reports of realizing single cycle CPU, including simulation waveform and download process)
- 2019-12-14 20:55:42下载
- 积分：1
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可以用于按键去抖动的电路应用，采用vhdl编写
可以用于按键去抖动的电路应用，采用vhdl编写-Button can be used to jitter circuit applications, the preparation of the use of VHDL
- 2022-10-29 22:25:07下载
- 积分：1
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VHDL--VGA
此VHDL语言程序可以控制液晶屏幕任意动画播放(The VHDL language program can control the LCD screen any animation)
- 2015-03-27 18:44:28下载
- 积分：1
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FPGA_trainning2013A
在EDA实验课上面，自己编写的NCO程序，可以产生出比较真实的正弦波、三角波以及锯齿波，用VHDL程序编写，有modelsim仿真textbench程序(On EDA experiment, oneself write the NCO program, can produce more real sine wave, triangular wave and sawtooth wave with VHDL programming, have the modelsim simulation textbench program
)
- 2013-07-16 15:05:28下载
- 积分：1
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Music_Player
这份代码完成的功能是通过蜂鸣器播放《梁祝》这首曲子，当然可以自行更改代码，以播放其它的乐曲，所用的硬件描述语言是VHDL，代码有四部分构成，顶层模块、预分频模块（产生基频）、音乐表格和分频模块（产生所需的各音调）。
- 2022-11-10 14:10:03下载
- 积分：1
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stm32-and-fpga-communication-by-spi
该实验完成的功能是STM32与FPGA通信(The function of the experiment is STM32 and FPGA communication)
- 2020-11-16 09:29:42下载
- 积分：1
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FPGA
FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.
- 2023-07-28 14:25:03下载
- 积分：1
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Can be directly downloaded to the chip used in the complete UART with FIFO proce...
可以直接下载到芯片用的带有FIFO的完全UART程序，vhdl语言编写。-Can be directly downloaded to the chip used in the complete UART with FIFO procedures, vhdl language.
- 2022-05-23 23:16:30下载
- 积分：1
