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各种常用模块的VHDL描叙实例，PDF格式
各种常用模块的VHDL描叙实例，PDF格式-various modules used VHDL depicts examples, PDF format
- 2022-03-21 06:08:45下载
- 积分：1
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dma_ahb
挂靠在AMBA2.0的AHB总线上的DMA装置，用于直接发起数据传输。(Anchored the DMA devices the AHB bus AMBA2.0, for initiating data transfer.)
- 2021-03-29 21:49:10下载
- 积分：1
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基于VHDL的I2C程序0003,很不错的论文及程序，，大家快下啊
基于VHDL的I2C程序0003,很不错的论文及程序，，大家快下啊-based on the I2C procedures VHDL 0003, a very good paper and procedures, we quickly under ah
- 2022-03-21 08:29:16下载
- 积分：1
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Discrete cosine transform and inverse discrete cosine transform of the HDL code...
离散余弦变换及反离散余弦变换的HDL代码及测试文件。包括VHDL及Verilog版本。可用途JPEG及MEPG压缩算法。-Discrete cosine transform and inverse discrete cosine transform of the HDL code and test files. Including VHDL and Verilog versions. And MEPG can use JPEG compression algorithm.
- 2023-04-06 08:40:04下载
- 积分：1
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1 前大灯可以随意打开和关闭；
2 当汽车左转弯的时候，前左转向灯闪烁，同时左后灯的3盏灯由右往左闪烁；
3 当汽车有转弯的时候，前右转向灯闪烁，同时右...
1 前大灯可以随意打开和关闭；
2 当汽车左转弯的时候，前左转向灯闪烁，同时左后灯的3盏灯由右往左闪烁；
3 当汽车有转弯的时候，前右转向灯闪烁，同时右后灯的3盏灯有左往右闪烁；
4 当汽车减速或紧急刹车的时候，左后灯和右后等同时闪烁；
5 当汽车在左转弯的同时减速，则前左转向灯闪烁，左后灯的3盏灯由右往左闪烁，同时右后灯都点亮。
6 当汽车在左转弯的同时减速，则前右转向灯闪烁，右后灯的3盏灯有左往右闪烁，同时左后灯都点亮。
-a former headlamps can be opened and closed at will; 2 when the vehicle made a left turn when the former left to lights flickered. Left lights while the three lights flashing from right-go left; 3 when the vehicle is making a turn when a right turn to the former lights flickered. Right after the lights while the three lights are blinking right and left; 4 when the vehicle deceleration or when the emergency brake, Left and right after the lights blink, and so on; 5 when the vehicle made a left turn at the same time to slow down, and then to the left before the lights flickered. Left lights three lights flashing from right-go left, right after the lights are lit. 6 when a car made a left turn at the same time to slow down, and then right before the lights to flick
- 2022-03-04 04:27:43下载
- 积分：1
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irda.tar
depends on irda transmitter recever
- 2009-11-20 00:31:48下载
- 积分：1
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Verilog_HDL源码， Verilog_HDL源码
Verilog_HDL源码， Verilog_HDL源码-Verilog_HDL source, Verilog_HDL FO
- 2022-06-21 00:23:39下载
- 积分：1
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Altium_Package_LMH0340
Altium Reference design for LMH0340 test bed and design
- 2013-05-11 04:21:35下载
- 积分：1
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全加器
利用Verilog语言编写的，在vivado环境下带进位标志的全加器的工程文件与Testbench(Engineering files and Testbench of the full adder with the carry mark in vivado environment written by Verilog language)
- 2018-08-06 14:15:55下载
- 积分：1
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LED-clock-display
利用单片机控制LED时钟显示，以及闹钟，程序较大，但比较简单易懂。(LED clock display)
- 2013-03-10 10:15:37下载
- 积分：1
