-
Digital signal source, the output of different frequency, phase is the cosine si...
数字信号源，输出不同频率，相位的正余弦信号，-Digital signal source, the output of different frequency, phase is the cosine signal,
- 2022-04-23 09:40:37下载
- 积分：1
-
400rdm
说明： 用于FPGA的学习，大家值得借鉴，可以好好学习一下(this is for fpga and you can use this.)
- 2020-06-16 15:20:02下载
- 积分：1
-
algorithm_design_and_logic_implemention
本书作者为夏宇文，详细讲解了从算法设计与验证到硬件逻辑实现的过程，要求读者有一定的verilog基础(This book author XIA Yu-Wen gave a detailed account from algorithms to hardware logic design and verification of implementation process, requiring readers to have some basis for verilog)
- 2009-11-11 21:19:03下载
- 积分：1
-
软I2C
i2c硬件程序,字节读、字节写，在modelsim6.0通过编译-the soft for i2c
- 2022-09-15 23:15:03下载
- 积分：1
-
GPSDECODE
完成GPS的IRIG_B码解码，已经模块化，并且有详细的中文注释(Completed the GPS IRIG_B of decoding modular, and there are detailed notes in Chinese)
- 2021-04-07 16:09:01下载
- 积分：1
-
manuals
ISE Design Suite Software Manuals and
Help - PDF Collection,ISE 软件手册以及帮助。(ISE Design Suite Software Manuals and Help- PDF Collection, ISE software manuals as well as help.)
- 2012-11-28 21:47:01下载
- 积分：1
-
Vhdl实现的鼠标协议历程，代码可读性高，适合作为案例参考。
Vhdl实现的鼠标协议历程，代码可读性高，适合作为案例参考。-VHDL realize the course of the mouse protocol, code readable, suitable as a reference case.
- 2023-05-02 16:50:03下载
- 积分：1
-
本人编写的定点除法器,开发软件为XILINX的ISE6.2,通过PAR仿真.
本人编写的定点除法器,开发软件为XILINX的ISE6.2,通过PAR仿真.-I prepared for the sentinel division, the development of software for the ISE6.2 Xilinx, PAR through simulation.
- 2022-09-14 19:00:03下载
- 积分：1
-
Simulation using VHDL language songs Andy Lau
用VHDL语言仿真歌曲刘德华的《月老》
-Simulation using VHDL language songs Andy Lau
- 2023-08-15 11:20:05下载
- 积分：1
-
lesson1
eda的入门学习课件，老师不错，内容页挺好的(eda learning files)
- 2012-12-14 22:39:31下载
- 积分：1
