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全数字fsk调制解调的实现 verilog源码
全数字fsk调制解调的实现 verilog源码-All-digital realization of fsk modem verilog source code
- 2023-04-11 15:55:04下载
- 积分:1
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6. For the key to enter a password lock, assuming that reset after the seven lam...
6对于进入密码锁的按键,假设复位后七个灯显示" 0",使用sw1、sw2 2,然后只要按下并松开sw2,七个灯上就显示" 2",而只要按下并松开sw1,七个灯上就正确显示值" 1
- 2022-03-11 23:10:49下载
- 积分:1
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freq_meter
FPGA的测频程序,用了D触发器,能测1hz到几百hz(FPGA frequency measurement procedures, using a D flip-flop, can be measured to a few hundred hz 1hz)
- 2016-04-03 13:41:48下载
- 积分:1
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Idddc_30mF
中频70M,30M带宽LFM信号,采样率为102.4M,,数字下变频后,还进行了三倍抽取,最后还得到I,Q两路信号
(IF 70M, 30M bandwidth LFM signal, the sampling rate 102.4M, under digital variable frequency after also carried out three times extracted, and finally also received the I and Q signals)
- 2012-07-25 23:56:30下载
- 积分:1
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大唐电信的FPGA设计经验,内部资料,详细完整,很有参考价值...
大唐电信的FPGA设计经验,内部资料,详细完整,很有参考价值-Datang Telecom
- 2022-03-04 13:47:05下载
- 积分:1
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波形发生器,用于编写testbentch文件。非常实用
波形发生器,用于编写testbentch文件。非常实用-Waveform generator, for the preparation of testbentch files. Useful
- 2022-10-22 19:55:04下载
- 积分:1
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verilog_median_filter
图像处理的中值滤波器,使用verilog开发环境编程实现。(Verilog development environment programming median filter)
- 2016-01-24 16:54:32下载
- 积分:1
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FPGA
一种基于FPGA的CPU设计-FPGA-based CPU design ........
- 2022-01-25 14:34:00下载
- 积分:1
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全数字锁相环的verilog源代码
全数字锁相环的verilog源代码-全数字锁相环的verilog源代码
- 2023-04-30 22:20:03下载
- 积分:1
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usbFPGAconnect
该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序,FPGA上的VERILOG通信程序。(The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, including PC, the USB firmware, drivers, FPGA' s Communication Program)
- 2021-04-08 15:19:00下载
- 积分:1