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用VHDL写的
用vhdl写的-using VHDL write
- 2022-03-16 07:17:41下载
- 积分:1
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vhdl testbench的编写,textio的编写是一个难点,也是一个重点,而这是本人搜集的多篇关于textio的文章,同时附有简单注释!...
vhdl testbench的编写,textio的编写是一个难点,也是一个重点,而这是本人搜集的多篇关于textio的文章,同时附有简单注释!-vhdl testbench preparation, textio the preparation is a difficult, but also a focus, and this is my collection of articles on textio the article, at the same time with a simple note!
- 2022-10-01 22:10:03下载
- 积分:1
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QAM发生仿真
在Qaurtus环境下用Verilog输入实现64QAM信号的发生,用MATLAB协助验证,观察了PN序列对应的星座图。(Simulating generation of 64QAM RF Signal in Quartus II IDE,identified with MATLAB,constellation gram displayed.)
- 2021-03-02 23:39:33下载
- 积分:1
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floatadd
说明: 浮点数加法器的源代码,实现浮点数的加法功能,浮点数遵循的是IEEE745标准(floating_piont addition)
- 2021-04-06 18:19:02下载
- 积分:1
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ad706_verilog
AD706在Sparten6使用的FPGA代码,测试通过(AD706 FPGA Code In Sparten6)
- 2017-02-06 10:39:29下载
- 积分:1
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SOUND_PLAY6
WM8731芯片的音效处理verilog代码,
WM8731芯片是音频ADCDAC芯片(WM8731 audio processing chip verilog code, WM8731 chip audio ADC DAC chip)
- 2013-12-14 14:12:10下载
- 积分:1
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VHDL硬件描述语言与数字逻辑电路设计
VHDL硬件描述语言与数字逻辑电路设计-VHDL hardware description language and digital logic circuit design
- 2023-03-10 23:05:04下载
- 积分:1
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09image_generation
code qui affiche une image sur ecran vga
- 2013-05-09 21:21:10下载
- 积分:1
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xapp265
High-Speed Data Serialization and
Deserialization(840 Mb/s LVDS)
for xilinx fpga
- 2010-03-16 16:25:41下载
- 积分:1
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verilog___UART
Verilog 编写的串口通信模块 带测试代码(Verilog prepared by the serial communication module with a test code)
- 2012-05-24 20:38:27下载
- 积分:1