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VHDL language design stopwatch, timer function of the realization, the realizati...

于 2022-09-16 发布文件大小:1.57 MB

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VHDL语言设计的秒表，实现计时功能，实现报时功能，并且通过硬件实验。-VHDL language design stopwatch, timer function of the realization, the realization of time functions, and through hardware experiments.

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利用来 vhdl 设计 p cm的实现
利用来 vhdl 设计 p cm的实现-Vhdl design used for the realization of p cm

2023-06-01 20:05:03下载

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ORIGINAL_DOWNLOAD
说明： risc 8 by coonan compatible with PIC16C57

2019-12-05 20:32:55下载

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Verilog written procedures for counting frequency meter module,
verilog写的频率计程序的计数模块,-Verilog written procedures for counting frequency meter module,

2022-03-20 18:03:19下载

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pex8311代码实现
pex8311代码实现 altera的fpga 代码编程实现本地读写 pex8311_test

2022-01-28 06:56:26下载

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可以实现对任意波形分任意频，分频加减通过按键实现。
可以实现对任意波形分任意频，分频加减通过按键实现。-Can be achieved for any arbitrary waveform at frequency, frequency addition and subtraction through the keys to achieve.

2022-01-29 02:49:45下载

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performance-of-pcie
本白皮书探讨了在PCI Express的因素技术可能会影响性能。它还提供指导如何估算的系统性能。(This white paper explores the factors in PCI Express technology may affect performance. It also provides guidance on how to estimate the system performance.)

2013-10-29 10:52:43下载

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DDC
说明：数字下变频verilog实现，项目中常用模块(apply the digital down frequency in my project)

2020-12-08 11:29:20下载

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taxione
说明：基于VHDL出租车的设计，实现开动、停止的收费功能。(VHDL-based cab design, implementation and running, stop the charging function.)

2010-04-25 14:33:58下载

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SASX
Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC

2020-06-24 11:40:02下载

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problem
在学习verilog 中与遇到一些列问题的整理。(this Documentation is about the problem about verilog which is meeted when i was learn FPGA)

2014-03-07 22:24:19下载

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VHDL language design stopwatch, timer function of the realization, the realizati...

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