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chap12
《Verilog HDL 程序设计教程》9("Verilog HDL Design Guide" 9)
- 2007-07-01 16:33:31下载
- 积分：1
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txt_util
VHDL库，仿真时使用的，包括打印，类型转换等实用的操作(Practical operation VHDL library, using simulation, including print, type conversion, etc.)
- 2014-05-23 13:07:31下载
- 积分：1
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20190717
uart documentation, july 17, 2019. the document describes the basics of verilog programming and how to implement them on an fpga device
- 2020-06-21 21:40:01下载
- 积分：1
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基于MAX2运用Quartus实现串口通信
基于MAX2运用Quartus实现串口通信-MAX2-based use of Quartus Serial Communication
- 2022-04-09 03:43:20下载
- 积分：1
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FPGA
FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.
- 2023-07-28 14:25:03下载
- 积分：1
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qam_64
Verilog语言下QAM调制的DDS实现(The QAM Modulation DDS achieve)
- 2021-02-20 11:59:43下载
- 积分：1
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FIR filter basic verilog code for implementation
FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
- 2022-07-11 03:20:47下载
- 积分：1
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8_BUS
BUS documentation and map reffereces
- 2020-06-25 19:40:02下载
- 积分：1
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这是一个简单的除法器（32bit/16bit),采用移位相减法
这是一个简单的除法器（32bit/16bit),采用移位相减法-This is a simple divider (32bit/16bit), using phase shift subtraction
- 2022-07-06 17:00:38下载
- 积分：1
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VHDL描述的简易图像缩小模块，将PAL制720×576的图片缩小为512×410，采用最近临域法，13.5MHz时钟下可实时处理PAL视频。...
VHDL描述的简易图像缩小模块，将PAL制720×576的图片缩小为512×410，采用最近临域法，13.5MHz时钟下可实时处理PAL视频。-VHDL description of a simple image to narrow the module, will be PAL system of 720 × 576 image reduced to 512 × 410, using the recent Pro-domain method, 13.5MHz clock can handle PAL video in real time.
- 2022-06-11 23:09:14下载
- 积分：1
