-
IIR
利用dsp builder设计的IIR滤波器，已经验证完全可以使用，只需要把其中系数改变。内含VHDL代码(Design IIR filters by dsp builder have been verified , just change the coffetions including VHDL code.)
- 2020-12-02 19:59:26下载
- 积分：1
-
S05_example_Network
vivado lwip 应用文档 基于zynq 7020(vivado lwip example text of zynq)
- 2020-06-17 11:40:02下载
- 积分：1
-
fpga2
FPGA学习的非常好的资料，希望广大朋友都可以学习学习啊(FPGA to learn very good information, I hope our friends can learn ah)
- 2013-05-28 22:09:28下载
- 积分：1
-
test1
利用matlab，对偏振控制器进行仿真，最终在邦加球上进行显示(Using matlab, simulation of the polarization controller eventually be displayed on the Poincare Sphere)
- 2013-04-07 10:42:15下载
- 积分：1
-
FRUDH
用VHDL实现频率计，可测量输入脉冲的频率，并进行简单校正(Realize the frequency of use of VHDL in terms of measurable input pulse frequency, and a simple correction)
- 2008-07-07 20:13:30下载
- 积分：1
-
FIFO
Verilog HDL语言编写异步FIFO(Verilog HDL language, asynchronous FIFO)
- 2012-05-31 15:13:21下载
- 积分：1
-
a2013_TCAS_NB-LDPC_decoder
Design of a GF(64)-LDPC Decoder Based on the
EMS Algorithm
- 2016-06-17 18:04:14下载
- 积分：1
-
The full version of the multiplier. I believe there is not a small improvement f...
完整版的乘法器.相信对初学者有不小的提高-The full version of the multiplier. I believe there is not a small improvement for beginners
- 2022-12-06 15:10:03下载
- 积分：1
-
RANGEN
2011年全国大学生电子设计竞赛E题“简易数字信号传输性能分析仪”fpga的控制代码，verilog编写；包括了M序列及同步时钟的提取等所有程序。(2011 National Undergraduate Electronic Design Contest E title "Simple digital signal transmission performance analyzer" fpga control code, verilog prepared including the M-sequence and synchronous clock extraction and all other programs.)
- 2020-10-27 17:09:59下载
- 积分：1
-
用FPGA实现的VGA接口程序，采用的语言是VHDL硬件描述语言，大家可以参照下看看采用的器件是Altera EP2c35...
用FPGA实现的VGA接口程序，采用的语言是VHDL硬件描述语言，大家可以参照下看看采用的器件是Altera EP2c35-Using FPGA to achieve the VGA interface program, the language used is VHDL hardware description language, we can see under the light of the devices used are Altera EP2c35
- 2023-09-07 02:45:04下载
- 积分：1
