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DDS
Verilog实现DDS线性调频,Verilog实现DDS线性调频(Verilog implementation of DDS linear FM,Verilog implementation of DDS linear FM)
- 2015-07-29 19:59:36下载
- 积分:1
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RC6-block-cipher-using-VHDL
VHDL implementation of RC6 encryption algorithm
Test file represent applying all zero input and all zero key
note that result is correct but bytes positions are swapped
- 2020-12-01 22:09:26下载
- 积分:1
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数字电压表程序
基于FPGA的数字电压表 两种方案 一种VHDL一种Verilog(Digital voltmeter based on FPGA)
- 2018-04-04 21:33:14下载
- 积分:1
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exp8
浙江大学体系结构实验课代码 实现5级流水线带有停顿,旁路和控制竞争的处理。(Experimental Architecture, Zhejiang University course code with a pause 5-stage pipeline, bypassing the treatment and control of competition.)
- 2020-09-26 12:07:46下载
- 积分:1
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全部通过,是我的精心设计,完全满足初学者的要求。
全部通过,是我的精心设计,完全满足初学者的要求。-all passed, I was carefully designed, fully meet the requirements of beginners.
- 2022-02-20 15:52:11下载
- 积分:1
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频率计实验程序代码
说明: XC7A35TCSG324-1的Verilog频率计程序,支持十分频,支持切换内外信号输入(Verilog frequency meter program of xc7a35tcsg324-1 supports decadal frequency division and switching internal and external signal input)
- 2019-12-24 13:40:45下载
- 积分:1
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hanming
Verilog HDL语言编写的汉明编码及解码器,附有时序仿真文件(Verilog HDL language encoding and decoding Hamming, with timing simulation file)
- 2017-06-22 15:56:38下载
- 积分:1
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4x4键盘模块。这个文件包括普通的键盘设计方案说明和相关的原程序。...
4x4键盘模块。这个文件包括普通的键盘设计方案说明和相关的原程序。-4x4 keyboard module. The documents include ordinary keyboard design program descriptions and procedures related to the original.
- 2022-01-26 02:27:17下载
- 积分:1
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yinpin_display0925
实现音频的I2S通信,音频柱的显示,及其噪声的处理等功能(Realization of audio I2S communications, audio column display, and its noise processing, and other functions)
- 2016-01-07 10:08:31下载
- 积分:1
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CU设计
计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计计算机组成原理CU设计
- 2023-06-25 08:00:03下载
- 积分:1