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I2C_code
与IP核配套的I2C-Master Core,包含了目前主流FPGA芯片的I2C实现,代码包括Altera/Xilinx/OpenCore等公司的VHDL/Verilog/C等。(I2C-Master Core)
- 2010-05-22 22:12:26下载
- 积分:1
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SV-Combinational-Logic
system Verilog combinational logic
- 2017-01-24 18:50:29下载
- 积分:1
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加减法器
可实现两个4bit补码的加法及减法,有溢出提示(adder with overflow hint)
- 2017-07-19 20:52:42下载
- 积分:1
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Study_Test
说明: 实现简单的硬件加法器、除法器,实现源码文中注释(Realize simple hardware adder and divider, realize source code)
- 2020-06-21 05:20:01下载
- 积分:1
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nerualnetwork
本文为通信专业硕士研究生的毕业论文。主要研究神经网络的FPGA实现及其在网络拥塞控制中的应用。
(In this paper, for the communications professional Master s thesis. Major study of the FPGA realization of neural networks and its application in network congestion control applications.)
- 2008-12-14 01:37:03下载
- 积分:1
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facman
一款在Verilog实现的吃豆人游戏,采用VGA接口,在Nexys3开发板上运行无误。(A pac-man game implemented via Verilog, using VGA interface, perfectly run on Nexys 3)
- 2021-03-31 07:39:09下载
- 积分:1
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一个FPGA
一个基于FPGA的串口程序,已经经过验证,对用FPGA做串口的朋友提供参考和借鉴!-an FPGA-based serial procedures have proven, right Serial do with FPGA reference for a friend and borrow!
- 2022-03-24 10:20:25下载
- 积分:1
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QC_LDPC_FPGA
LDPC QC-LDPC 基于FPGA的QC-LDPC实现 论文(LDPC QC-LDPC FPGA-based QC-LDPC detailed implementation steps
Thesis)
- 2021-04-08 09:29:00下载
- 积分:1
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VHDL编写的数字钟,在Q
VHDL编写的数字钟,在Q-ii下编译,实现闹铃设置与定时闹铃,分时秒显示-VHDL prepared digital clock, in the Q-ii under the compiler to achieve regular alarm and alarm settings, time-seconds display
- 2022-12-10 02:20:03下载
- 积分:1
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FPGA中按键弹跳消除模块的研究与应用,原理和例子都非常好
FPGA中按键弹跳消除模块的研究与应用,原理和例子都非常好-FPGA to eliminate bounce in key research and application modules, principles and examples are very good
- 2022-02-20 02:12:06下载
- 积分:1