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test bench for alu 6 functions
test bench for alu 6 functions
- 2022-03-02 06:50:51下载
- 积分：1
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一个UDP／IP核心架构的VHDL实现
资源描述这个包提供了一个UDP／IP核心架构的一个开源的VHDL实现和PC机与FPGA接口传输基础C类型（字符、16 / 32 / 64位的整数，浮点数和双打）。
- 2022-07-22 12:16:57下载
- 积分：1
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VHDL_COUNTING 0_9_LED 7 段 (ĐẾM 0 ĐẾN 9 HIỂN THỊ LED 7 ĐOẠN BẰNG NGÔN NGỮ VHDL)
VHDL_COUNTING 0_9_LED 7 段 (ĐẾM 0 ĐẾN 9 HIỂN THỊ LED 7 ĐOẠN BẰNG NGÔN NGỮ VHDL)
- 2022-02-11 16:15:23下载
- 积分：1
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参数化FFT源代码，点数和位宽可变，内附testbench和说明文档
参数化FFT源代码，点数和位宽可变，内附testbench和说明文档-parameters of the source code FFT, counting and variable bit-enclosing testbench and documentation
- 2022-02-20 03:06:01下载
- 积分：1
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实用的程序代码，希望对大家有用，已经调试通过
实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
- 2022-09-21 12:35:03下载
- 积分：1
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RFID
RFID防碰撞算法的研究，以及对其各种算法的仿真，以及改进算法的仿真和比较。(RFID anti-collision algorithm, as well as its simulation algorithms, and improved simulation and comparison algorithms.)
- 2020-12-03 09:59:25下载
- 积分：1
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这是FPGA的Spartan 3E基础工程文件。该项目是基于VGA游戏…
this fpga spartan 3e based project file .the project is the game based on vga.
this file contains 2,20,25,400Hz clock generating file as per required for the project.-this is fpga spartan 3e based project file .the project is the game based on vga.
this file contains 2,20,25,400Hz clock generating file as per required for the project.
- 2023-02-25 10:20:03下载
- 积分：1
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halfband
verilog写的39阶通带为20KHz的半带fir滤波器，经测试正确。(verilog halfband FIR)
- 2020-12-25 14:29:04下载
- 积分：1
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4x4 electronic locks central control system. Six input control.
4X4电子密码锁的中央控制系统。控制6位输入。-4x4 electronic locks central control system. Six input control.
- 2022-02-10 10:06:12下载
- 积分：1
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Microcomputer-Principle
该书介绍了英特尔的80x86CPU和一些串行通信芯片，以及汇编语言。(The book introduces the Intel 80x86CPU and some serial communications chip, and assembly language.)
- 2013-07-27 14:55:25下载
- 积分：1
