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多thershod电源
静态功耗减少使用多 thershld< 跨度 style="font-size:12.0pt;line-height:115%;font-family:"color:#222222;background:white ;"> 多阈值 CMOStransistors 是非常手术滴备用泄漏功率 duringwhen IC 为较长时间内不活动。最近,功率 gatingscheme 提出了维护多个关闭电源模式和减小电极电源甚至短的不活跃时期。但是,这种系统能进行从高灵敏度对工艺参数变化。我们建议新浇注逻辑开关,是容错过程和 reducepower 在任何数字电路。预计的提案需要很少的金额项目努力和妥协降低功耗较大和较低的面积开销比早些时候的方法。此外,它可以团结生存系统 toproposition 额外的静态功耗减少方面受益。考试广泛娱乐的成果证明成功的拟议的设计
- 2023-03-16 10:55:03下载
- 积分:1
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DES加密算法的VHDL实现,采用流水线技术实现
DES加密算法的VHDL实现,采用流水线技术实现(The VHDL implement of DES encrypt algorithmic)
- 2020-07-01 03:00:02下载
- 积分:1
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PLD与8051接口的参考设计 Xilinx提供的verilog源代码
PLD与8051接口的参考设计 Xilinx提供的verilog源代码-PLD 8051 interface with the Xilinx Reference Design for the Verilog source code
- 2022-05-12 14:58:28下载
- 积分:1
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fjq1
介绍了在数字语音通信中, 利用在系统可编程技术和复杂可编程逻辑器件CPLD, 实现了数字语音的复接和分接
对于其中的单稳态电路的数字化和数字锁相环提取位同步信号也进行了详细的设计说明。实际应用结果表明, 系统工作稳
定可靠, 设计是成功的。(Describes the digital voice communications, the use of in-system programmable technical and complex programmable logic device CPLD, to achieve the digital voice multiplexer and demultiplexer for the single steady state in which the digital circuit and digital phase locked loop extraction bit synchronization signals are also carried out a detailed design specification. The practical application results show that the system works stable and reliable design is successful.)
- 2020-12-01 10:39:28下载
- 积分:1
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freeDev数字应用开发板中的VGA控制器的IP核的verilog实现
freeDev数字应用开发板中的VGA控制器的IP核的verilog实现-freeDev digital application development board of the VGA controller IP core implementation of the verilog
- 2022-03-01 11:34:28下载
- 积分:1
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UVM
uvm验证方法学入门。step by step,适合IC验证人员入门(uvm verification methodology started. step by step, for IC verification personnel entry)
- 2015-04-05 23:14:20下载
- 积分:1
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shengyinchuli
通过matlab对于声音进行处理,实现FFT,均值,方差,中值滤波,自相关分析,白噪声等处理(Matlab sound processing, FFT, mean, variance, median filtering, autocorrelation analysis, white noise and processing)
- 2021-03-01 22:29:34下载
- 积分:1
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raised-cosine-filter
代码实现了一个根升余弦成型滤波器,2PAM信号通过此成型滤波器,并且匹配接收,画出了发送和接收波形,验证了代码的正确性。(The code designs a root raised cosine filter,2PAM signal transmitted through the filter and matched using the same filter, I plot the transmitted signal and received signal to verify the correctness of the code.)
- 2012-11-09 21:59:53下载
- 积分:1
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123456789
给出了SVPWM算法的详细FPGA实现方法!(A detailed FPGA SVPWM algorithm to achieve the method!)
- 2017-04-05 13:50:53下载
- 积分:1
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倍频器
倍频器-WE
- 2022-08-16 20:57:43下载
- 积分:1