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VGA
verilog vga 图像处理(verilog vga)
- 2013-10-15 19:00:16下载
- 积分：1
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5L_SVPWM_ANPC_CPLD
基于CPLD硬件描述语言编写的五电平SVPWM脉冲触发程序(Five level SVPWM pulse trigger program based on CPLD hardware description language)
- 2020-12-14 16:19:15下载
- 积分：1
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bjgm
四间隔频率变化，并循环输出50~51ms之间的频率。(Four-interval frequency changes and the cycle between 50 ~ 51ms output frequency.)
- 2008-08-21 11:46:20下载
- 积分：1
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CCPRRIzipP
一种基于CPRI标准的WCDMA NoddeB射频光纤拉远接口FPGA设计.pdf
(CPRI compliant the WCDMA NoddeB RF fiber pull far from the interface of the FPGA design. Pdf)
- 2012-07-19 22:29:39下载
- 积分：1
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A clock procedures, as well as stopwatch, I feel pretty good, there is a need to...
一个时钟程序，还有跑表，感觉相当不错的，有需要就下载吧-A clock procedures, as well as stopwatch, I feel pretty good, there is a need to download it
- 2022-03-12 05:29:00下载
- 积分：1
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Frame-synchronizer-
原创，帧同步器的Verilog代码，在FPGA上验证实现过，无误。作为通信系统帧传输的仿真，有限状态机同步态和失步态的切换仿真。(Original Verilog code for frame synchronization, verify the implementation on the FPGA, and correct. Frame transmission as the communication system simulation, finite state machine synchronous state and the loss of the switching simulation of gait.)
- 2012-04-01 19:38:54下载
- 积分：1
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Its-GPS-ranging-codes
GPS信号结构,C/A码产生方式及其测距码研究(GPS signal structure and ranging code research)
- 2014-03-20 08:51:27下载
- 积分：1
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AD7606URAT
Verilog实现高速AD7606数据采样，8通道，采样频率可调，支持串口数据发送，亲测可用。(Verilog AD7606 high-speed data sampling, 8-channel, the sampling frequency is adjustable, support for serial data transmission, pro-test is available.)
- 2021-04-16 21:38:53下载
- 积分：1
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sqr
VHDL CODE FOR SQUARE WAVE GENERATOR
- 2014-01-22 17:14:20下载
- 积分：1
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zhitouzi
原创。掷骰子游戏，VHDL，quartus，北京邮电大学数电实验，实现随机掷骰子游戏，在数码管显示点数，点阵显示输赢，有开机动画以及开机音乐，可实现多人游戏等(games, VHDL, quartus,experiments of BUPT, pure originality,random game, in the digital display dots, dot matrix display winning or losing, there are boot animation and boot music, multiplayer gaming can be achieved)
- 2020-12-24 20:49:04下载
- 积分：1
