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cpldfpga
《CPLDFPGA嵌入式应用开发技术白金手册》源代码，涉及FPGA/CPLD的各个方面，键盘扫描，LED扫描等简单程序及滤波器等的设计(" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design)
- 2009-04-20 20:59:16下载
- 积分：1
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K9HCG08U1D K9PDG08U5D K9LBG08U0D K9MDG08U5D 三星 4G 8G 16G nand资料
K9HCG08U1D K9PDG08U5D K9LBG08U0D K9MDG08U5D 三星 4G 8G 16G nand资料-K9HCG08U1D K9PDG08U5D K9LBG08U0D K9MDG08U5D Samsung 4G 8G 16G nand datasheet
- 2022-01-28 16:21:35下载
- 积分：1
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VHDL程序
利用QuartusⅡ6.0对所设计的出租车计费器的VHDL代码进行仿真，并在FPGA数字实验系统上实现了该控制。(The Quartus II 6 is used to simulate the VHDL code of the designed taxi billing device, and the control is realized on the FPGA digital experiment system.)
- 2017-12-14 12:35:23下载
- 积分：1
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clock_FPGA_verilog
简易电子钟的设计（verilog HDL）(Simple design of the electronic clock (verilog HDL))
- 2012-11-03 10:35:49下载
- 积分：1
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ultractr源码，XPS技术，基于PPC平台
ULTRACTR的源码，xps工程实现，基于PPC平台-ULTRACTR source code, xps engineering, based on the PPC platform
- 2022-01-28 09:49:38下载
- 积分：1
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硬件描述语言
verilog HDL 4×4矩阵键盘驱动程序包括硬件电路图-verilog
- 2022-04-27 04:55:21下载
- 积分：1
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class16_pll
说明： FPGA实现PLL锁相环，输出不同频率的时钟控制信号。(FPGA realizes PLL and outputs clock control signals of different frequencies.)
- 2021-03-19 17:19:19下载
- 积分：1
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: Random pulse width modulation speed control system to solve the exchange of ac...
：随机脉宽调制是解决交流调速系统 中声学噪声的直接有效方法。随机零矢 量分 布是一种很好 的随
机方法，但其不对称的开关函数使其不适用于传统的电流采样方法。通过仿真表明 PWM周期中点采样的方
法无法得到准确的平均值，在分析不对称模式引起的纹波电流对电流平均值影响的基础上，提出了一种适合
于 RZV分布 的电流采样方法 。仿真结果证实该方法简单可行 。 -: Random pulse width modulation speed control system to solve the exchange of acoustic noise in a direct and effective way. Random zero vector distribution is a good random method, but the asymmetrical switching function so that it does not apply to the traditional current sampling methods. PWM cycle through the simulation shows that the mid-point sampling methods can not be an accurate, on average, the analysis of asymmetric mode ripple current caused by the impact on the current average value based on the proposed distribution of a suitable RZV current sampling methods. The simulation results confirmed that the method is simple and feasible.
- 2022-04-24 11:00:11下载
- 积分：1
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ProtelDesignInVHDL
说明： Protel中VHDL设计参考,pdf,不错的一本学习VHDL的书(Protel design in VHDL)
- 2009-08-21 11:16:24下载
- 积分：1
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CircuitDesignwithVHDL[1]
这主要是学习vhdl和fpga设计的一些资料(study for vhdl and fpga)
- 2009-05-13 09:31:26下载
- 积分：1
